Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 446

DDR Memory Controller
Table 9-35. Programming Differences Between Memory Types (continued)
Parameter
RD_TO_PRE Read to Precharge Timing
CKE_PLS Minimum CKE Pulse Width DDR1
FOUR_ACT Four Activate Window
RD_EN Registered DIMM Enable
8_BE 8-beat burst enable
2T_EN 2T Timing Enable
ODT_CFG ODT Configuration
BSTOPR Burst To Precharge Interval DDR1
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
9-52
Description
DDR1
DDR2
DDR2
DDR1
DDR2
DDR1
DDR2
DDR1
DDR2
DDR1
DDR2
DDR1
DDR2
DDR2
Differences
Should be set to 010 if burst length is 4 and 100 if
burst length is 8
Should be set according to the specifications for
the memory used (t ). Time between read and
RTP
precharge for non-zero value of additive latency
(AL) is a minimum of AL + t
Can be set to 001
Should be set according to the specifications for
the memory used (t )
CKE
Should be set to 00001
Should be set according to the specifications for
the memory used (t ). Only applies to eight
FAW
logical banks.
If registered DRAM modules are used, then this
field should be set to 1
If registered DRAM modules are used, then this
field should be set to 1
If 8-beat bursts are desired, then this field should
be set to 1
Should be set to 0
In heavily loaded systems, this can be set to 1 to
gain extra timing margin on the interface at the
cost of address/command bandwidth.
In heavily loaded systems, this can be set to 1 to
gain extra timing margin on the interface at the
cost of address/command bandwidth.
Should be set to 00
Can be set for termination at the IOs according to
system topology. Typically, if ODT is enabled, then
the internal IOs should be set up for termination
only during reads to DRAM.
Can be set to any value, depending on the
application. Auto precharge can be enabled by
setting this field to all 0s.
Can be set to any value, depending on the
application. Auto precharge can be enabled by
setting this field to all 0s.
Section/Page
9.4.1.6/9-16
cycles.
RTP
9.4.1.6/9-16
9.4.1.6/9-16
9.4.1.7/9-18
9.4.1.7/9-18
9.4.1.7/9-18
9.4.1.8/9-21
9.4.1.12/9-26
Freescale Semiconductor