Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 126

Memory Map
Offset
0x2_4520 MIIMCFG—MII management configuration
0x2_4524 MIIMCOM—MII management command
0x2_4528 MIIMADD—MII management address
0x2_452C MIIMCON—MII management control
0x2_4530 MIIMSTAT—MII management status
0x2_4534 MIIMIND—MII management indicator
0x2_4538 Reserved
0x2_453C IFSTAT—Interface status
0x2_4540 MACSTNADDR1—MAC station address register 1
0x2_4544 MACSTNADDR2—MAC station address register 2
0x2_4548 MAC01ADDR1*—MAC exact match address 1, part 1
0x2_454C MAC01ADDR2*—MAC exact match address 1, part 2
0x2_4550 MAC02ADDR1*—MAC exact match address 2, part 1
0x2_4554 MAC02ADDR2*—MAC exact match address 2, part 2
0x2_4558 MAC03ADDR1*—MAC exact match address 3, part 1
0x2_455C MAC03ADDR2*—MAC exact match address 3, part 2
0x2_4560 MAC04ADDR1*—MAC exact match address 4, part 1
0x2_4564 MAC04ADDR2*—MAC exact match address 4, part 2
0x2_4568 MAC05ADDR1*—MAC exact match address 5, part 1
0x2_456C MAC05ADDR2*—MAC exact match address 5, part 2
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
2-22
Table 2-2. Memory Map (continued)
Register Access Reset
R/W 0x0000_0007
R/W 0x0000_0000
R/W 0x0000_0000
WO 0x0000_0000
R 0x0000_0000
R 0x0000_0000
— —
R 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
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