Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 948

Universal Serial Bus Interface
Note that this register is shared between the host and device mode functions. In host mode, it is the
PERIODICLISTBASE register; in device mode, it is the DEVICEADDR register. See
"Device Address Register (DEVICEADDR)—Non-EHCI,"
Offset 0x2_3154
31
R
W
Reset n n n n n
Figure 16-12. Periodic Frame List Base Address (PERIODICLISTBASE)
Bits Name
31–12 PERBASE Base address. Correspond to memory address signal [31:12]. Only used in the host mode.
11–0 — Reserved, should be cleared.
16.3.2.7 Device Address Register (DEVICEADDR)—Non-EHCI
This register is not defined in the EHCI specification. In device mode, the upper seven bits of this register
represent the device address. After any controller reset or a USB reset, the device address is set to the
default address (0). The default address will match all incoming addresses. Software shall reprogram the
address after receiving a SET_ADDRESS descriptor.
Note that this register is shared between the host and device mode functions. In device mode, it is the
DEVICEADDR register; in host mode, it is the PERIODICLISTBASE register. See
"Periodic Frame List Base Address Register (PERIODICLISTBASE),"
Offset 0x2_3154
31
R
USBADR
W
Reset
Bits Name
31–25 USBADR Device address. This field corresponds to the USB device address.
24–0 — Reserved, should be cleared.
16.3.2.8 Current Asynchronous List Address Register (ASYNCLISTADDR)
This 32-bit register contains the address of the next asynchronous queue head to be executed by the host.
Bits 4–0 of this register cannot be modified by the system software and always return zeros when read.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
16-20
PERBASE
n n n n n n n n n
Table 16-15. PERIODICLISTBASE Register Field Descriptions
25 24
Figure 16-13. Device Address (DEVICEADDR)
Table 16-16. DEVICEADDR Register Field Descriptions
for more information.
12 11
n n 0 0 0 0 0 0
Description
for more information.
—
All zeros
Description
Section 16.3.2.7,
Access: Read/Write
—
0 0 0 0 0 0 0 0
Section 16.3.2.6,
Access: Read/Write
Freescale Semiconductor
0
0 0
0