Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 735

eTSEC1
Offset
0x2_4548 MAC01ADDR1*—MAC exact match address 1, part 1
0x2_454C MAC01ADDR2*—MAC exact match address 1, part 2
0x2_4550 MAC02ADDR1*—MAC exact match address 2, part 1
0x2_4554 MAC02ADDR2*—MAC exact match address 2, part 2
0x2_4558 MAC03ADDR1*—MAC exact match address 3, part 1
0x2_455C MAC03ADDR2*—MAC exact match address 3, part 2
0x2_4560 MAC04ADDR1*—MAC exact match address 4, part 1
0x2_4564 MAC04ADDR2*—MAC exact match address 4, part 2
0x2_4568 MAC05ADDR1*—MAC exact match address 5, part 1
0x2_456C MAC05ADDR2*—MAC exact match address 5, part 2
0x2_4570 MAC06ADDR1*—MAC exact match address 6, part 1
0x2_4574 MAC06ADDR2*—MAC exact match address 6, part 2
0x2_4578 MAC07ADDR1*—MAC exact match address 7, part 1
0x2_457C MAC07ADDR2*—MAC exact match address 7, part 2
0x2_4580 MAC08ADDR1*—MAC exact match address 8, part 1
0x2_4584 MAC08ADDR2*—MAC exact match address 8, part 2
0x2_4588 MAC09ADDR1*—MAC exact match address 9, part 1
0x2_458C MAC09ADDR2*—MAC exact match address 9, part 2
0x2_4590 MAC10ADDR1*—MAC exact match address 10, part 1
0x2_4594 MAC10ADDR2*—MAC exact match address 10, part 2
0x2_4598 MAC11ADDR1*—MAC exact match address 11, part 1
0x2_459C MAC11ADDR2*—MAC exact match address 11, part 2
0x2_45A0 MAC12ADDR1*—MAC exact match address 12, part 1
0x2_45A4 MAC12ADDR2*—MAC exact match address 12, part 2
0x2_45A8 MAC13ADDR1*—MAC exact match address 13, part 1
0x2_45AC MAC13ADDR2*—MAC exact match address 13, part 2
0x2_45B0 MAC14ADDR1*—MAC exact match address 14, part 1
0x2_45B4 MAC14ADDR2*—MAC exact match address 14, part 2
0x2_45B8 MAC15ADDR1*—MAC exact match address 15, part 1
0x2_45BC MAC15ADDR2*—MAC exact match address 15, part 2
0x2_45C0– Reserved
0x2_467C
0x2_4680 TR64—Transmit and receive 64-byte frame counter
0x2_4684 TR127—Transmit and receive 65- to 127-byte frame counter
0x2_4688 TR255—Transmit and receive 128- to 255-byte frame counter
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Table 15-4. Module Memory Map (continued)
1
Name
eTSEC Transmit and Receive Counters
Enhanced Three-Speed Ethernet Controllers
2
Access Reset
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
— —
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
Section/Page
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