Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 624

PCI Bus Interface
Bits Name
19 PME_Clock
18–16 Version
15–8 NEXT_CAP_PTR
7–0 CAP_ID
13.3.3.28 PCI Power Management Register 1 (PCIPMR1)
The PCI power management register 1 (PCIPMR1), shown in
software uses to manage the PCI controller's power management state, as well as to enable and monitor
PMEs (power management events). This register can be accessed by the host in agent mode.
Offset 0x84
31
R
W
Reset 0 0 0
15 14 13
R PME_
Data_Scale
Status
W
Reset 0 0 0
Table 13-44 describes the PCIPMR1 fields.
Bits Name
31–24 Data
23 BPCC_En
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
13-42
Table 13-43. PCIPMR0 Field Descriptions (continued)
PME clock
0 Indicates that no PCI clock is required for the PCI controller to generate PME#
1 Indicates that PCI clock is required for the PCI controller to generate PME#
PCI Power Management Interface Specification version.
011 Revision 1.2 of the PCI Power Management Interface Specification
The next capability pointer points to the next item in the PCI controller's capability list.
0000_0000 The end of the capability list
0000_0001 Indicates the power management support capability
Data
0 0 0 0
12 9
Data_Select
0 0 0 0
Figure 13-46. PCI Power Management Register 1 (PCIPMR1)
Table 13-44. PCIPMR1 Field Descriptions
Reports the state dependent data requested by the Data_Select field. The value of this field
is scaled by the value reported by the Data_Scale field.
Bus power/Clock control enable
0 Disable the bus power/clock control policies defined in section 4.7.1 of the PCI Bus
Power Management Interface Specification Revision 1.2
1 Enable the bus power/clock control policies defined in section 4.7.1 of the PCI Bus Power
Management Interface Specification Revision 1.2
Note: This bit field is not implemented, only required for all PCI-to-PCI Bridge
Description
Figure
24 23 22 21
BPCC
B2_B3
_En
0 0 0 0
8 7
PME_
—
En
0 0 0 0
Description
13-46, contains the bit fields that
Access: Read / write
—
0 0 0
4 3 2
No_Soft
—
_Reset
0 0 0
Freescale Semiconductor
16
0 0
1 0
Power_State
0 0