SICRH[Bits] Value:
0b0/0b00
Bits
Group
Pin Function 0
7
eLBC
8–9
INTR_B
2
10–11
I
C
IIC1_SDA
IIC1_SCL
IIC2_SDA
IIC2_SCL
12–13 ETSEC2_B
TSEC2_COL
14–15 ETSEC2_C
TSEC2_CRS
16–17 ETSEC2_D TSEC2_GTX_CLK
18–19 ETSEC2_E
TSEC2_RX_CLK
20–21 ETSEC2_F
TSEC2_RX_DV
22–23 ETSEC2_G
TSEC2_RX_ER
TSEC2_TX_CLK
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Table 5-29. SICRH Bit Settings (continued)
0b1/0b01
Pin Function 1
LA7
—
LA8
—
LA9
—
LA10
—
LA11
—
LA12
—
LA13
—
LA14
—
LA15
—
IRQ_B4
CKSTOP_IN
CKSTOP_OUT
CKSTOP_IN
PMC_PWR_OK
—
GTM1_TIN4/GTM2_TI
N3
GTM1_GATE4/GTM2_
TGATE3
GTM1_TOUT4
GTM1_TIN2/GTM2_TI
N1
GTM1_TGATE2/GTM
2_TGATE1
GTM1_TOUT2
—
0b10
Pin Function 2
1
TSEC_1588_TRIG2
1
TSEC_1588_ALARM1
1
TSEC_1588_PP3
—
1
TSEC_1588_CLK
1
TSEC_TMR_GCLK
1
TSEC_TMR_PP1
1
TSEC_TMR_PP2
1
TSEC_TMR_ALARM2
—
—
—
TSEC_TMR_ALARM2
—
—
—
—
GTM2_TOUT3
—
—
GTM2_TOUT1
—
System Configuration
0b11
Reset
Value
Pin Function 3
GPIO7
1
GPIO13
GPIO14
—
GPIO[12]
00
TSEC_TMR_TRIG1
00
GPIO[10]
GPIO[11]
GPIO[15]
00 RTBI
11 Else
GPIO[16]
00 RTBI
11 Else
GPIO[17]
00 RTBI
11 Else
GPIO[18]
00 RTBI
11 Else
GPIO[19]
00 RTBI
11 Else
GPIO[24]
00 RTBI
11 Else
GPIO[25]
—
5-25