Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 315

See Section 6.2.1, "Arbiter Configuration Register (ACR),"
ACR[RPTCNT]PCI.
6.3.1.3 Address Bus Arbitration after ARTRY
The ARTRY protocol is used primarily by the CPU to interrupt a transaction that hits to a modified line in
its D-cache, so that it can maintain data coherency by performing the snoop copyback. When CPU asserts
ARTRY, the bus is immediately granted to the CPU to perform snoop copyback. After the completion of
snoop copyback, the arbiter grants the bus back to the master that had its transaction ARTRYed.
6.3.1.4 Address Bus Parking
The arbiter supports address bus parking. This feature implies that when no master is requesting the bus
(all bus requests are negated), the arbiter can choose to park the address bus (or assert the address bus
grant) to a master. The parked master can skip the bus request and assume the bus mastership directly. This
reduces the access latency for parked master.
See Section 6.2.1, "Arbiter Configuration Register (ACR),"
ACR[PARKM].
6.3.1.5 Data Bus Arbitration
For every committed address tenure a data tenure is required to complete the transaction.
In the device system, the arbiter controls the issuing of data bus grants to a master and a slave, which are
involved in a data tenure of a previously performed address tenure.
6.3.2 Bus Error Detection
The arbiter is responsible for tracking the following cases on the bus:
• Address time out
• Data time out
• Transfer error
• Address only transaction type
• Reserved transaction type
• Illegal (eciwx/ecowx) transaction type
6.3.2.1 Address Time Out
Address time out occurs, if the address tenure was not ended before the specified time-out period
(programmed by ATR[ATO]). In this case, the arbiter performs as follows:
1. Ends the address tenure.
2. Starts data tenure and ends it by asserting transfer error.
3. Reports on the event to AER[ATO].
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
for more details about programming
for more details about ACR[APARK] and
Arbiter and Bus Monitor
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