Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 259

• Input capture capability
• Output compare with programmable mode for the output pin
• Free run and restart modes
• Functional and programming compatibility with MPC8260 timers
5.7.3 GTM Modes of Operation
The GTM unit can operate in the following modes.
5.7.3.1 Cascaded Modes
GTCFRn[PCAS] and GTCFR2[SCAS] are used to put the timers into different cascaded modes:
• Non-cascaded mode: Each timer (timer 1, timer 2, timer 3, and timer 4), function as a independent
16-bit timer with a 16-bit GTRFR, GTCPR, GTMDR, and GTCNR. In this mode, the non-cascaded
GTRFR, GTCPR, and GTCNR should be referenced with corresponding 16-bit bus cycles.
• Pair-cascaded mode: In this mode, two 16-bit timers can be internally cascaded to form a 32-bit
counter: timer 1 can be internally cascaded to timer 2 and timer 3 may be internally cascaded to
timer 4. Because the decision to cascade timers is made independently, the user has the option of
selecting two 16-bit timers and one 32-bit timer, or two 32-bit timers. When working in the
pair-cascaded mode, the cascaded GTRFR, GTCPR, and GTCNR should be referenced with 32-bit
bus cycles.
• Super-cascaded mode: In this mode, all four 16-bit timers can be internally cascaded to form a
64-bit counter. When working in the super-cascaded mode, the cascaded GTRFR, GTCPR, and
GTCNR should be referenced with two 32-bit bus cycles.
5.7.3.2 Clock Source Modes
The clock input to the timer's prescaler can be selected from three sources:
• The system clock
• The system slow go clock (system bus clock internally divided by 16)
• The corresponding TINx pin
5.7.3.3 Reference Modes
Each timer can be configured to count until a reference is reached and then either begin a new time count
immediately or continue to run. The FRR bit of the corresponding GTMRR selects each mode.
• Free run reference mode. The corresponding timer count continues to increment after the reference
value is reached.
• Reset reference mode. The corresponding timer count is reset immediately after the reference value
is reached.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
System Configuration
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