Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 981

16.5.4 Split Transaction Isochronous Transfer Descriptor (siTD)
All full-speed isochronous transfers through the internal transaction translator are managed using the siTD
data structure. This data structure satisfies the operational requirements for managing the split transaction
protocol.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
I/O Port Number
0000_0000_0000_00000
1
ioc P 0000
Buffer Pointer (Page 0)
Buffer Pointer (Page 1)
Figure 16-39. Split-Transaction Isochronous Transaction Descriptor (siTD)
1
Host controller read/write; all others read-only.
16.5.4.1 Next Link Pointer
DWord0 of a siTD is a pointer to the next schedule data structure.
Bits Name
31–5 Next Link This field contains the address of the next data object to be processed in the periodic list and
Pointer corresponds to memory address signals [31:5], respectively.
4–3 — Reserved, should be cleared. These bits must be written as zeros.
2–1 Typ Indicates to the host controller whether the item referenced is an iTD/siTD or a QH. This allows the host
controller to perform the proper type of processing on the item after it is fetched. Value encodings are:
00 iTD (isochronous transfer descriptor)
01 QH (queue head)
10 siTD (split transaction isochronous transfer descriptor
11 FSTN (frame span traversal node)
0 T Terminate.
0 Link pointer is valid.
1 Link pointer field is not valid.
16.5.4.2 siTD Endpoint Capabilities/Characteristics
DWords 1 and 2 specify static information about the full-speed endpoint, the addressing of the parent
Companion Controller, and micro-frame scheduling control.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Next Link Pointer
0 Hub Address
1
Total Bytes to Transfer
Back Pointer
Table 16-46. Next Link Pointer
15 14 13 12 11 10 9 8
0000 EndPt
µFrame C-mask
1
µFrame C-prog-mask
000_0000
Description
Universal Serial Bus Interface
7 6 5 4 3 2 1
00 Typ
0 Device Address
µFrame S-mask
1
Status
1
Current Offset
1
TP T-count
0000
0 offset
T 0x00
0x04
0x08
0x0C
0x10
1
0x14
T 0x18
16-53