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Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 774

Integrated
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Enhanced Three-Speed Ethernet Controllers
Offset eTSEC1:0x2_4334; eTSEC2:0x2_5334
0
R
W
Reset
Figure 15-27. Receive Queue Filer Table Address Register Definition
Table 15-32
describes the fields of the RQFAR register.
Bits
Name
0–23
Reserved
24–31
RQFAR Current index of receive queue filer table, which spans a total of 256 entries.
15.5.3.3.7
Receive Queue Filer Table Control Register (RQFCR)
RQFCR is accessed to read or write the RQCTRL words in entries of the receive queue filer table. The
table entries are described in greater detail in
through RQFCR is defined by the current value of RQFAR.
Figure 15-28
describes the definition for the RQFCR register.
Offset eTSEC1:0x2_4338; eTSEC2:0x2_5338
0
1
R
GPI
W
Reset
Figure 15-28. Receive Queue Filer Table Control Register Definition
Table 15-33
describes the fields of the RQFCR register.
Bit
Name
0
GPI
General purpose interrupt. When a property matches the value in the RQPROP entry at this index, and
REJ = 0 and AND = 0, the filer will instruct the Rx descriptor controller to set IEVENT[FGPI] when the
corresponding receive frame is written to memory.
If the timer is enabled (TMR_CTRL[TE] = 1), then TMR_PEVENT[RXP] will also be set.
1–15
Reserved, should be written with zero.
16–21
Q
Receive queue index, from 0 to 63, inclusive, written into the Rx frame control block associated with the
received frame. When a property matches the value in the RQPROP entry at this index, and REJ = 0 and
AND = 0, the frame is sent to either RxBD ring 0 (if RCTRL[FSQEN] = 1) or the RxBD ring with index (Q mod
8) and the filing table search is terminated. In the case where RCTRL[FSQEN] = 0, 8 virtual receive queues
are overlaid on every RxBD ring, and software needs to consult the RQ field of the Rx frame control block to
determine which virtual receive queue was chosen.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
15-56
Table 15-32. RQFAR Field Descriptions
Section 15.6.4.2, "Receive Queue Filer."
15 16
(undefined)
Table 15-33. RQFCR Field Descriptions
All zeros
Description
21
22
Q
CLE REJ AND CMP —
Description
Access: Read/Write
23 24
RQFAR
The word accessed
Access: Read/Write
23
24
25 26 27 28
PID
Freescale Semiconductor
31
31

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