Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 127

Offset
0x2_4570 MAC06ADDR1*—MAC exact match address 6, part 1
0x2_4574 MAC06ADDR2*—MAC exact match address 6, part 2
0x2_4578 MAC07ADDR1*—MAC exact match address 7, part 1
0x2_457C MAC07ADDR2*—MAC exact match address 7, part 2
0x2_4580 MAC08ADDR1*—MAC exact match address 8, part 1
0x2_4584 MAC08ADDR2*—MAC exact match address 8, part 2
0x2_4588 MAC09ADDR1*—MAC exact match address 9, part 1
0x2_458C MAC09ADDR2*—MAC exact match address 9, part 2
0x2_4590 MAC10ADDR1*—MAC exact match address 10, part 1
0x2_4594 MAC10ADDR2*—MAC exact match address 10, part 2
0x2_4598 MAC11ADDR1*—MAC exact match address 11, part 1
0x2_459C MAC11ADDR2*—MAC exact match address 11, part 2
0x2_45A0 MAC12ADDR1*—MAC exact match address 12, part 1
0x2_45A4 MAC12ADDR2*—MAC exact match address 12, part 2
0x2_45A8 MAC13ADDR1*—MAC exact match address 13, part 1
0x2_45AC MAC13ADDR2*—MAC exact match address 13, part 2
0x2_45B0 MAC14ADDR1*—MAC exact match address 14, part 1
0x2_45B4 MAC14ADDR2*—MAC exact match address 14, part 2
0x2_45B8 MAC15ADDR1*—MAC exact match address 15, part 1
0x2_45BC MAC15ADDR2*—MAC exact match address 15, part 2
0x2_45C0– Reserved
0x2_467C
0x2_4680 TR64—Transmit and receive 64-byte frame counter
0x2_4684 TR127—Transmit and receive 65- to 127-byte frame
counter
0x2_4688 TR255—Transmit and receive 128- to 255-byte frame
counter
0x2_468C TR511—Transmit and receive 256- to 511-byte frame
counter
0x2_4690 TR1K—Transmit and receive 512- to 1023-byte frame
counter
0x2_4694 TRMAX—Transmit and receive 1024- to 1518-byte frame
counter
0x2_4698 TRMGV—Transmit and receive 1519- to 1522-byte good
VLAN frame count
0x2_469C RBYT—Receive byte counter
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Table 2-2. Memory Map (continued)
Register
eTSEC Transmit and Receive Counters
eTSEC Receive Counters
Access Reset
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
— —
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
Memory Map
Section/Page
15.5.3.5.15/15-78
15.5.3.5.16/15-79
—
15.5.3.6.1/15-80
15.5.3.6.2/15-80
15.5.3.6.3/15-81
15.5.3.6.4/15-81
15.5.3.6.5/15-82
15.5.3.6.6/15-82
15.5.3.6.7/15-83
15.5.3.6.8/15-83
2-23