Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 762

Enhanced Three-Speed Ethernet Controllers
TR03WT has no effect. A description of how queue weights affect eTSEC's round-robin algorithm
appears in Section 15.6.4.3.2, "Modified Weighted Round-Robin Queuing (MWRR)." Figure 15-15
describes the TR03WT register.
Offset eTSEC1:0x2_4140; eTSEC2:0x2_5140
0
R
WT0
W
Reset
Table 15-20 describes the fields of the TR03WT register.
Bits Name
0–7 WT0 Weighting value for TxBD ring 0 when TCTRL[TXSCHED] = 10. On each round of the Tx scheduler, a minimum
of WT0 × 64 bytes of data are scheduled for transmission from TxBD ring 0. Clearing this field prevents
transmission.
8–15 WT1 Weighting value for TxBD ring 1 when TCTRL[TXSCHED] = 10. On each round of the Tx scheduler, a minimum
of WT1 × 64 bytes of data are scheduled for transmission from TxBD ring 1. Clearing this field prevents
transmission.
16–23 WT2 Weighting value for TxBD ring 2 when TCTRL[TXSCHED] = 10. On each round of the Tx scheduler, a minimum
of WT2 × 64 bytes of data are scheduled for transmission from TxBD ring 2. Clearing this field prevents
transmission.
24–31 WT3 Weighting value for TxBD ring 3 when TCTRL[TXSCHED] = 10. On each round of the Tx scheduler, a minimum
of WT3 × 64 bytes of data are scheduled for transmission from TxBD ring 3. Clearing this field prevents
transmission.
15.5.3.2.7 TxBD Ring 4–7 Weighting Register (TR47WT)
When modified weighted round-robin Tx scheduling is enabled (TCTRL[TXSCHED] = 10), this register
determines the weighting applied to each enabled transmit queue for queues 4 to 7. For priority-based
scheduling, TR47WT has no effect. A description of how queue weights affect eTSEC's modified
weighted round-robin algorithm appears in
Queuing (MWRR)." Figure 15-16
Offset eTSEC1:0x2_4144; eTSEC2:0x2_5144
0
R
WT4
W
Reset
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
15-44
7 8
WT1
Figure 15-15. TR03WT Register Definition
Table 15-20. TR03WT Field Descriptions
Section 15.6.4.3.2, "Modified Weighted Round-Robin
describes the definition for the TR47WT register.
7 8
WT5
Figure 15-16. TR47WT Register Definition
15 16
WT2
All zeros
Description
15 16
WT6
All zeros
Access: Read/Write
23 24
WT3
Access: Read/Write
23 24
WT7
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