Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 953

Bits Name
31 ULPIWU
30 ULPIRUN
29 ULPIRW
28 —
27 ULPISS
26–24 ULPIPORT
23–16 ULPIADDR
15–8 ULPIDATRD
7–0 ULPIDTWR
There are two operations that can be performed with the ULPI viewport, wakeup and read /write
operations. The wakeup operation is used to put the ULPI interface into normal operation mode and
re-enable the clock if necessary. A wakeup operation is required before accessing the registers when the
ULPI interface is operating in low power mode, serial mode, or carkit mode. The ULPI state can be
determined by reading the sync state bit (ULPISS). If this bit is set, then the ULPI interface is running in
normal operation mode and can accept read/write operations. If the ULPISS is cleared, then read/write
operations will not be able execute. Undefined behavior results if a read or write operation is performed
when ULPISS is cleared. To execute a wakeup operation, write all 32-bits of the ULPI Viewport where
ULPIPORT is constructed appropriately and the ULPIWU bit is set and the ULPIRUN bit is cleared. Poll
the ULPI Viewport until ULPIWU is cleared for the operation to complete.
To execute a read or write operation, write all 32-bits of the ULPI Viewport where ULPIDATWR,
ULPIADDR, ULPIPORT, ULPIRW are constructed appropriately and the ULPIRUN bit is set. Poll the
ULPI Viewport until ULPIRUN is cleared for the operation to complete. For read operations,
ULPIDATRD is valid once ULPIRUN is cleared.
The polling method above can be replaced with interrupts using the ULPI interrupt defined in the USBSTS
and USBINTR registers. When a wakeup or read/write operation completes, the ULPI interrupt is set.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Table 16-21. ULPI VIEWPORT Field Descriptions
ULPI Wake Up. Writing 1 to this bit begins the wakeup operation. This bit automatically
transitions to 0 after the wakeup is complete. Once this bit is set, it can not be cleared by
software.
Note: The driver must never execute a wakeup and a read/write operation at the same time.
ULPI Run. Writing 1 to this bit begins a read/write operation. This bit automatically transitions
to 0 after the read/write is complete. Once this bit is set, it can not be cleared by software.
Note: The driver must never execute a wakeup and a read/write operation at the same time.
This bit selects between running a read or write operation to the ULPI.
0 Read
1 Write
Reserved, should be cleared.
This bit represents the state of the ULPI interface. Before reading this bit, the ULPIPORT field
should be set accordingly if used with the multi-port host. Otherwise, this field should always
remain 0.
0 Any other state (that is, carkit, serial, low power).
1 Normal Sync State.
For wakeup or read/write operations this value selects the port number to which the ULPI PHY
is attached. Valid values are 0 and 1.
When a read or write operation is commanded, the address of the operation is written to this
field.
After a read operation completes, the result is placed in this field.
When a write operation is commanded, the data to be sent is written to this field.
Universal Serial Bus Interface
Description
16-25