Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 8

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Number
5.6.4 PIT External Signal Description ................................................................................ 5-43
5.6.5 PIT Memory Map/Register Definition ...................................................................... 5-44
5.6.5.1 Periodic Interval Timer Control Register (PTCNR) .............................................. 5-44
5.6.5.2 Periodic Interval Timer Load Register (PTLDR) .................................................. 5-45
5.6.5.3 Periodic Interval Timer Prescale Register (PTPSR) .............................................. 5-46
5.6.5.4 Periodic Interval Timer Counter Register (PTCTR).............................................. 5-46
5.6.5.5 Periodic Interval Timer Event Register (PTEVR) ................................................. 5-46
5.6.6 Functional Description............................................................................................... 5-47
5.6.6.1 Periodic Interval Timer Unit.................................................................................. 5-47
5.6.6.2 PIT Operational Modes.......................................................................................... 5-48
5.6.7 PIT Programming Guidelines .................................................................................... 5-48
5.7 General-Purpose Timers (GTMs)................................................................................... 5-48
5.7.1 GTM Overview .......................................................................................................... 5-48
5.7.2 GTM Features ............................................................................................................ 5-49
5.7.3 GTM Modes of Operation.......................................................................................... 5-50
5.7.3.1 Cascaded Modes .................................................................................................... 5-50
5.7.3.2 Clock Source Modes.............................................................................................. 5-50
5.7.3.3 Reference Modes ................................................................................................... 5-50
5.7.3.4 Capture Modes....................................................................................................... 5-51
5.7.4 GTM External Signal Description ............................................................................. 5-51
5.7.5 GTM Memory Map/Register Definition.................................................................... 5-52
5.7.5.1 Global Timers Configuration Registers (GTCFRn)............................................... 5-54
5.7.5.2 Global Timers Mode Registers (GTMDR1–GTMDR4) ........................................ 5-57
5.7.5.3 Global Timers Reference Registers (GTRFR1–GTRFR4) .................................... 5-58
5.7.5.4 Global Timers Capture Registers (GTCPR1–GTCPR4) ........................................ 5-58
5.7.5.5 Global Timers Counter Registers (GTCNR1–GTCNR4) ...................................... 5-59
5.7.5.6 Global Timers Event Registers (GTEVR1–GTEVR4) .......................................... 5-59
5.7.5.7 Global Timers Prescale Registers (GTPSR1–GTPSR4) ........................................ 5-60
5.7.6 Functional Description............................................................................................... 5-61
5.7.6.1 General-Purpose Timer Units ................................................................................ 5-61
5.7.6.2 Reference Modes ................................................................................................... 5-61
5.7.6.3 Capture Modes....................................................................................................... 5-61
5.7.6.4 Cascaded Modes .................................................................................................... 5-62
5.7.7 Initialization/Application Information ....................................................................... 5-64
5.7.7.1 Programming Guidelines ....................................................................................... 5-64
5.7.7.1.1
5.8 Power Management Control (PMC) .............................................................................. 5-64
5.8.1 External Signal Description ....................................................................................... 5-65
5.8.2 PMC Memory Map/Register Definition .................................................................... 5-65
5.8.2.1 Power Management Controller Configuration Register (PMCCR)....................... 5-66
5.8.2.2 Power Management Controller Event Register (PMCER).................................... 5-67
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
viii
Contents
GTM Registers................................................................................................... 5-64
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Freescale Semiconductor