Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 867

The definition of the 8-byte custom preamble sequence is shown in
Byte Offsets
0 1
0–1
2–3
4–5
6–7
The fields of the custom preamble sequence are described in
preamble octets matching the standard start of frame delimiter (0xD5) can be expected to trigger premature
frame reception by the receiving station.
Bytes Bits Name
0–1 0–7 PreOct0 Octet #0 of custom transmit preamble. This is the first octet of preamble sent.
8–15 PreOct1 Octet #1 of custom transmit preamble. This is the second octet of preamble sent.
2–3 0–7 PreOct2 Octet #2 of custom transmit preamble. This is the third octet of preamble sent.
8–15 PreOct3 Octet #3 of custom transmit preamble. This is the fourth octet of preamble sent.
4–5 0–7 PreOct4 Octet #4 of custom transmit preamble. This is the fifth octet of preamble sent.
8–15 PreOct5 Octet #5 of custom transmit preamble. This is the sixth octet of preamble sent.
6–7 0–7 PreOct6 Octet #6 of custom transmit preamble. This is the seventh octet of preamble sent. The last octet
8–15 —
15.6.2.5.2 User-Visible Preamble Reception
To return the received preamble, the user must ensure that:
• MACCFG2[PreAm RxEN] bit is set
• Space for an 8-byte preamble sequence is allowed before the Ethernet DA field in the first receive
data buffer of each frame
The definition of the 8-byte received preamble sequence is shown in
Byte Offsets
0 1
0–1
2–3
4–5
6–7
The fields of the received preamble sequence are described in
be shorter than the 7-octet sequence defined by IEEE Std. 802.3, initial bytes of the received preamble
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
2 3 4 5
PreOct0
PreOct2
PreOct4
PreOct6
Figure 15-131. Definition of Custom Preamble Sequence
Table 15-144. Custom Preamble Field Descriptions
(the start of frame delimiter) is generated by the MAC automatically.
Reserved; should be cleared.
2 3 4 5
PreOct0
PreOct2
PreOct4
PreOct6
Figure 15-132. Definition of Received Preamble Sequence
Enhanced Three-Speed Ethernet Controllers
Figure
6 7 8 9 10
Table 15-144. It should be noted that use of
Description
Figure
6 7 8 9
Table 15-145. Should the received preamble
15-131.
11 12 13 14
PreOct1
PreOct3
PreOct5
15-132.
10 11 12 13
PreOct1
PreOct3
PreOct5
15
14 15
15-149