Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 37

Paragraph
Number
19.4.1.5 SPI Transmit Data Hold Register (SPITD).......................................................... 19-14
19.4.1.6 SPI Receive Data Hold Register (SPIRD)........................................................... 19-15
19.4.1.6.1
19.5 Initialization/Application Information ......................................................................... 19-16
19.5.1 SPI Master Programming Example ......................................................................... 19-16
19.5.2 SPI Slave Programming Example............................................................................ 19-16
20.1 Overview........................................................................................................................ 20-1
20.2 JTAG Signals ................................................................................................................. 20-1
20.2.1 External Signal Descriptions ..................................................................................... 20-2
20.3 JTAG Registers and Scan Chains .................................................................................. 20-3
21.1 Introduction.................................................................................................................... 21-1
21.1.1 Overview.................................................................................................................... 21-1
21.1.2 Features...................................................................................................................... 21-1
21.2 External Signal Description ........................................................................................... 21-2
21.2.1 Signals Overview....................................................................................................... 21-2
21.3 Memory Map/Register Definition ................................................................................. 21-2
21.3.1 GPIO Direction Register (GPDIR) ............................................................................ 21-3
21.3.2 GPIO Open Drain Register (GPODR)....................................................................... 21-3
21.3.3 GPIO Data Register (GPDAT)................................................................................... 21-4
21.3.4 GPIO Interrupt Event Register (GPIER) ................................................................... 21-4
21.3.5 GPIO Interrupt Mask Register (GPIMR)................................................................... 21-4
21.3.6 GPIO Interrupt Control Register (GPICR) ................................................................ 21-5
A.1 Changes From Revision 1 to Revision 2 ........................................................................ A-1
A.2 Changes From Revision 0 to Revision 1 ...................................................................... A-23
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Contents
Reverse Mode SPMODE[REV] Examples ..................................................... 19-15
JTAG/Testing Support
General Purpose I/O (GPIO)
Revision History
Title
Chapter 20
Chapter 21
Appendix A
Glossary
Index
Page
Number
xxxvii