Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 108

Memory Map
Address
0x2_4000–0x2_4FFF eTSEC 1
0x2_5000–0x2_5FFF eTSEC 2
0x2_6000–0x2_7FFF Reserved
0x2_8000–0x2_BFFF Reserved
0x2_C000–0x2_DFFF Reserved
0x2_E000–0x2_FFFF Reserved
0x3_0000–0x3_FFFF Security engine
0x4_0000–0x7_FFFF Reserved
0x8_0000–0xB_FFFF Reserved
0xC_0000–0xD_FFFF Reserved
0xE_0000–0xE_1FFF Reserved
0xE_2000–0xE_2FFF Reserved
0xE_3000–0xE_30FF Reserved
0xE_3100–0xE_31FF Reserved
0xE_3200–0xE_33FF Reserved
0xE_3400–0xE_37FF Reserved
0xE_3800–0xE_3FFF Reserved
0xE_4000–0xE_7FFF Reserved
0xE_8000–0xE_FFFF Reserved
0xF_0000–0xF_FFFF Reserved
Table 2-2 lists the memory-mapped registers.
Offset
0x0_0000 Internal memory map base address register (IMMRBAR)
0x0_0004 Reserved
0x0_0008 Alternate configuration base address register (ALTCBAR)
0x0_000C– Reserved
0x0_001C
0x0_0020 eLBC local access window 0 base address register
(LBLAWBAR0)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
2-4
Table 2-1. IMMR Memory Map (continued)
Use
Table 2-2. Memory Map
Register
System Configuration Registers
Actual Size Window
3 Kbytes + 1K 4 Kbytes
reserved
3 Kbytes + 1K 4 Kbytes
reserved
— 8 Kbytes
— 16 Kbytes
8 Kbytes 8 Kbytes
— 8 Kbytes
52 Kbytes 64 Kbytes
— 256 Kbytes
— 256 Kbytes
— 128 Kbytes
— 8 Kbytes
— 4 Kbytes
— 256 bytes
— 256 bytes
— 512 bytes
— 1 Kbyte
— 2 Kbytes
— 16 Kbytes
— 32 Kbytes
— 64 Kbytes
Access Reset
R/W 0xFF40_0000
— —
R/W 0x0000_0000
— —
1
R/W 0x0000_0000
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