Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 187

4.3.2.2.8 LALE Configuration
The LALE reset configuration word field, shown in
LALE signal. Refer to the hardware specifications for specific timing information.
Reset Configuration
Word High Register
(RCWHR) Bit
29
4.3.3 Loading the Reset Configuration Words
The device loads the reset configuration words from a local bus EEPROM, a local bus NAND Flash, or an
2
I C serial EEPROM, or uses hard-coded configuration, as selected by the reset configuration inputs
described in Section 4.3.1, "Reset Configuration Signals."
options.
4.3.3.1 Loading from Local Bus
The reset configuration words are assumed to reside in an EEPROM or NOR Flash or NAND Flash device
connected to LCS0 of the device local bus. Because the port size of this EEPROM is unknown, the device
reads all configuration words byte-by-byte only from locations that are independent of port size.
Table 4-20 shows addresses that should be used to contain the reset configuration words. Byte addresses
that do not appear in this table have no effect on the configuration of the device. The values of the bytes
in Table 4-20 are always read on byte lane LAD[0:7] regardless of the port size.
.
Reset Configuration Word
Low
High
Table 4-21 shows the data structure of the local bus device containing the reset configuration words
(RCWL and RCWH).
.
Table 4-21. Local Bus Reset Configuration Words Data Structure
EEPROM Address
0x00
0x04
0x08
0x0C
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Table 4-19. LALE Configuration
Value
Field Name
(Binary)
LALE 0
1
Table 4-20. Local Bus Configuration EEPROM Addresses
Bits [0:7] Address
0x00
0x20
[0:7]
RCWL[0:7]
RCWL[8:15]
Table 4-19, configures the timing of the local bus
Normal LALE timing
LALE is negated 1/2 a LBC_controller_clk earlier
The following sections describe each of these
Bits [8:15] Address Bits [16:23] Address Bits [24:31] Address
0x08
0x28
EEPROM Data Bits
[8:15] [16:23]
Reset, Clocking, and Initialization
Meaning
0x10 0x18
0x30 0x38
[24:31]
4-21