Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 246

System Configuration
Signal I/O
RTC_CLK I This signal is used as the timebase for the real time clock module.
Meaning
5.5.5 RTC Memory Map/Register Definition
The RTC programmable register map occupies 32 bytes of memory-mapped space. Reading undefined
portions of the memory map returns all zeros; writing has no effect.
All RTC registers are 32 bits wide that are located on 32-bit address boundaries and should only be
accessed as a 32-bit quantities.
All addresses used in this section are offsets from the RTC base, as defined in
Table 5-33 shows the memory map of the RTC.
Offset
0x00 Real time counter control register (RTCNR)
0x04 Real time counter load register (RTLDR)
0x08 Real time counter prescale register (RTPSR)
0x0C Real time counter register (RTCTR)
0x10 Real time counter event register (RTEVR)
0x14 Real time counter alarm register (RTALR)
0x18–0x1F Reserved
5.5.5.1 Real Time Counter Control Register (RTCNR)
The real time counter control register (RTCNR), shown in
The register can be read at any time.
Offset 0x00
0
R
W
Reset
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
5-38
Table 5-38. RTC External Signal—Detailed Signal Description
State —
Timing —
Table 5-39. RTC Register Address Map
Register
—
Figure 5-25. Real Time Counter Control Register (RTCNR)
Description
Access
R/W
R/W
R/W
R
w1c
R/W
—
Figure 5-25, is used to enable RTC functions.
23
All zeros
Chapter 2, "Memory Map."
Section/
Reset Value
Page
0x0000_0000 5.5.5.1/5-38
0x0000_0000 5.5.5.2/5-39
0x0000_0000 5.5.5.3/5-40
0x0000_0000 5.5.5.4/5-40
0x0000_0000 5.5.5.5/5-41
0xFFFF_FFFF 5.5.5.6/5-41
—
Access: Read/Write
24 25 26 29
CLEN CLIN —
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AIM SIM