Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 550

Enhanced Local Bus Controller
LCLK
LAD
LALE
TA
LCS n
(RAS)
LBS n
(CAS)
LBCTL
10.5.6 Interfacing to ZBT SRAM Using UPM
ZBT SRAMs have been designed to optimize the performance of table access in networking applications.
This section describes how to interface to ZBT SRAMs.
is used to generate control signals. The same interfacing is used for pipelined and flow-through versions
of ZBT SRAMs. However different UPM patterns must be generated for those cases. Because ZBT
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
10-102
cst1 1
cst2 1
cst3 1
cst4 1
bst1 1
bst2 1
bst3 1
bst4 1
g0l0
g0l1
g0h0
g0h1
g1t1
g1t3
g2t1
g2t3
g3t1
g3t3
g4t1
g4t3
g5t1
g5t3
redo[0]
redo[1]
loop 0
exen 0
amx0 0
amx1 0
na 0
uta 0
todt 1
last 1
EXS
Figure 10-79. Exception Cycle
Figure 10-80
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
Bit 15
Bit 16
Bit 17
Bit 18
Bit 19
Bit 20
Bit 21
Bit 22
Bit 23
Bit 24
Bit 25
Bit 26
Bit 27
Bit 28
Bit 29
Bit 30
Bit 31
shows the connections. The UPM
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