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Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 894

Integrated
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Enhanced Three-Speed Ethernet Controllers
FreeBDsRequired
This case comes about when:
The eTSEC has just started transmitting a large frame and thus cannot send out a pause frame
Upon reception of the pause request the far-end has just started transmission of a large frame
The eTSEC receives a burst of short frames with minimum inter-frame-gap (96bit times for
ethernet)
Once the user has determined the worst case scenario for their application, they program the required free
BD threshold into the eTSEC (through RQPRM[PBTHR]). Since different BD rings may have different
sizes and expected packet arrival rates, a separate threshold is provided for each active ring. It is
recommended that a threshold of at least fourBDs is the practical minimum for gigabit ethernet links.
For the Rx descriptor controller to determine the number of free BDs remaining in the ring, it needs to
know the following:
1. The location of the current BD being used by hardware
2. The location of the last BD that was released (freed) by software
3. The length of the Rx BD ring.
For each active ring, the current BD pointer (RBPTRn) is maintained by the eTSEC. Software knows both
the size of the Rx ring and the location of the last freed BD. By providing the eTSEC with those values
(through RQPRM[LEN] and RFBPTR respectively) the eTSEC always know how many receive buffers
are available to be consumed by incoming data.
The number of guaranteed free BDs in the ring is then determined by:
When RFBPTRn < RBPTRn
When RFBPTRn > RBPTRn
When RBPTRn = RFBPTRn the number of free BDs in the ring is either one (since RFBPTRn points to a
free BD) or equal to the ring length. Since the BD pointed to by RBPTRn may be either in use or about to
be used, it is not considered in the free BD count. To resolve the case where the two pointers collide, the
following logic applies:
If RBASEn was updated and thus initializes both RBPTRn and RFBPTRn, the ring is deemed empty.
If RFBPTRn is updated by a software write and matches RBPTRn, the ring is deemed empty.
If HW updates RBPTRn and the result matches RFBPTRn, the ring is deemed to have one BD remaining.
Upon writing this BD back to memory (indicating the buffer is occupied) the ring is deemed to be full.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
15-176
MaxFrameSize
------------------------------------------------------- -
=
MinFrameSize
[
FreeBDs
=
RQPRMn LEN
FreeBDs
=
RFBPTRn RBPTRn
MaxFrameSize
--------------------------------------- -
+
+
IFG
RxBufferSize
] RBPTRn
+
RFBPTRn
+
LinkDelay
Freescale Semiconductor

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