Manual Contents - Analog Devices SHARC ADSP-2136 Series Hardware Reference Manual

Manual Contents

Manual Contents
This manual provides detailed information about the ADSP-2136x pro-
cessors in the following chapters:
• Chapter 1,
Provides an architectural overview of the ADSP-2136x SHARC
processors.
• Chapter 2,
Describes input/output processor architecture, and provides direct
memory access (DMA) procedures for the processor peripherals.
• Chapter 2,
The memory-to-memory DMA controller is capable of transferring
64-bit bursts of data between internal memories.
• Chapter 4,
Describes how the processor's on-chip DMA controller acts as a
machine for transferring data without core interruption.
• Chapter 5,
Provides information about the digital application interface (DAI)
which allows you to attach an arbitrary number and variety of
peripherals to the processor while retaining high levels of
compatibility.
• Chapter 6,
Describes the six dual data line serial ports. Each SPORT contains
a clock, a frame sync, and two data lines that can be configured as
either a receiver or transmitter pair.
• Chapter 7,
Describes the operation of the seri a l peripheral interface (SPI) port.
SPI devices communicate using a master-slave relationship and can
achieve high data transfer rate because they can operate in
full-duplex mode.
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"Introduction"
"I/O Processor"
"Memory-to-Memory Port DMA"
"Parallel Port"
"Digital Application Interface"
"Serial Ports"
"Serial Peripheral Interface Ports"
ADSP-2136x SHARC Processor Hardware Reference
for the ADSP-21362/3/4/5/6 Processors