Texas Instruments OMAP5912 Reference Manual page 45

Multimedia processor device overview and architecture
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GPIO
32-Bit Dual-Mode Timer
SPRU748A
There are four instances of the GPIO modules (GPIO1, GPIO2, GPIO3,
GPIO4) included in OMAP5912.
Each GPIO module supports:
-
Data input/output register
-
Event detection capability:
J
To generate two synchronous interrupts in active mode
J
To generate a wake-up request while the system is in idle mode
This peripheral allows connection of 16 dedicated pins configurable either as
input or output for general purposes.
Eight data output lines of the GPIO3 are ORed together to generate a global
output line at the OMAP5912 boundary. This global output line can be used in
conjunction with the SSI to provide a CMT-APE interface to the OMAP5912.
There are eight instances of this timer. It contains a free-running upward
counter with autoreload capability on overflow. The timer counter can be read
and written on the fly (while counting). The timer module includes compare
logic to allow an interrupt event on a programmable counter matching value.
A dedicated output signal can be pulsed or toggled on overflow and match
event. This offers timing stamp trigger signal or PWM (pulse width modulation)
signal sources. A dedicated input signal can be used to trigger automatic timer
counter capture and interrupt event on programmable input signal transition
type.
All of the general-purpose timers have the capability to run either from the
system clock or from the sleep clock (32-kHz clock).
OMAP5912 Description
Introduction
45

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