Texas Instruments OMAP5912 Reference Manual page 51

VLYNQ
2.2.3 Other Modules
JTAG TAP Controller
eFuse Modules
SPRU748A
Note:
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The MMC/SDIO2 clock is multiplexed between the 48-MHz clock (APLL
output) and the system clock (19.2 MHz or 12 MHz).
-
At reset, the MMC/SDIO2 clock selection is the system clock.
-
Whereas the MMC/SDIO1 interface includes all of the MMC/SDIO pins
except the direction controls (data and control), the full MMC/SDIO2 is
routed at the OMAP5912 level. The OMAP5912 configuration selects
only the part of the interface that is required.
VLYNQ is a serial (that is, low pin count) communications interface that
enables the extension of an internal bus segment to one or more external
physical devices. The external devices are mapped into local, physical
address space and appear as if they are on the internal bus of the OMAP 5912.
The external devices must also have a VLYNQ interface. The VLYNQ module
serializes bus transactions in one device, transfers the serialized data
between devices via a VLYNQ port, and deserializes the transaction in the
external device.
OMAP5912 JTAG TAP controller handles standard IEEE JTAG interfaces.
Boundary scan chain is implemented in OMAP5912.
The generic electrical fuse implementation refers to the combination of
electrical fuse, control, and connectivity that enables the programming and
use of electrical fuses before the packaging. Electrical fuses are generally
used for:
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Memory repair
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Die identification
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Production identification (bits used in combination to qualify the
OMAP5912 device, either in the emulation, high security, or
general-purpose)
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Encryption key coding
OMAP5912 Description
Introduction 51