Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1366

ADSP-SC58x MSI Register Descriptions
Card Threshold Control Register
The
MSI_CDTHRCTL
has a Busy Clear interrupt generation bit.
BSYCLRIEN (R/W)
Busy Clear Interrupt Enable
RDTHR[10:0] (R/W)
Card Read Threshold Size
Figure 26-19: MSI_CDTHRCTL Register Diagram
Table 26-22: MSI_CDTHRCTL Register Fields
Bit No.
(Access)
26:16 RDTHR
(R/W)
1 BSYCLRIEN
(R/W)
0 RDTHREN
(R/W)
26–60
register sets the card read threshold size and enables card read threshold. This register also
15 14 13 12 11 10
0 0 0 0 0 0
31 30 29 28 27 26
0 0 0 0 0 0
Bit Name
Card Read Threshold Size.
The MSI_CDTHRCTL.RDTHR bit configures the card read threshold size. For infor-
mation on using this feature, see the "Card Read Threshold" section in the MSI chap-
ter.
Busy Clear Interrupt Enable.
The MSI_CDTHRCTL.BSYCLRIEN bit indicates the completion of a busy driven
by the card after a write data transfer.
Card Read Threshold Enable.
The MSI_CDTHRCTL.RDTHREN bit enables the card read threshold size feature.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
9 8 7 6 5 4 3 2
0 0 0 0 0 0 0 0
25 24 23 22 21 20 19 18
0 0 0 0 0 0 0 0
Description/Enumeration
0 Busy clear interrupt disabled
1 Busy clear interrupt enabled
0 Card read threshold disabled
1 Card read threshold enabled
1 0
0 0
RDTHREN (R/W)
Card Read Threshold Enable
17 16
0 0