Table 512. Implemented Instructions - STMicroelectronics SPC572L series Reference Manual

GTM Development Interface (GTMDI)
Private
Instruction name
public
NEXUS-ENABLE Public
BYPASS Public
Data is shifted between TDI and TDO starting with the least significant bit, as illustrated in
Figure 454. This applies for the instruction register and all Nexus tool-mapped registers.
MSB
TDI
42.6.5.1 Enabling the GTMDI TAP controller
Assertion of the TRST input resets all TAP controllers on the SoC. The controllers are
loaded with the BYPASS instruction upon exit of the TEST-LOGIC-RESET JTAG controller
state. Loading the NEXUS-ENABLE instruction grants access to Nexus debug. GTMDI acts
as BYPASS by loading any other instruction. The TDO bit is driven with the value of the
instruction register while in SHIFT-IR state.
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Table 512. Implemented instructions

/ Opcode
4b0000 Activate Nexus controller state machine to read and write GTMDI registers
Implements a single shift register stage providing a minimum serial length
4b1111
between TDI and TDO
Figure 454. Shifting data into register
Selected Register
DocID027809 Rev 4
Description
LSB
RM0400
TDO