Signals - STMicroelectronics SPC572L series Reference Manual

RM0400
CLKMT1
CLKMT2
CLKMN0_RMT (XOSC)
CLKMN0_RMT_ACTIVE
CLKMT0_RMN (IRCOSC)
CLKMN1
(monitored clock)
CLKMN1_ACTIVE
(from
23.3

Signals

Table 224
Signal
CLKMN0_RMT
CLKMN1
CLKMT0_RMN
Note: See the "Clocking" chapter for device specific clock sources of each CMU.
Figure 173. Clock Monitor Unit diagram
CMU_CSR[CKSEL1]
CLK_SEL
01
10
00,11
CLKMN0_RMT Supervisor
f
CLKMN0_RMT
CLKMN1 Supervisor
Fixed
Prescaler
/4
f
CLKMN1
describes the signals on the boundary of the CMU (in alphabetical order).
Table 224. Signal description
I/O
Monitored Clock Signal 0/Metered Clock Signal Reference — Receives a clock signal
that the CMU compares to a specified low-limit frequency to determine whether the
I
frequency of the clock signal is greater than the specified limit. Also provides a
reference clock signal for all metered clock signals.
Monitored Clock Signal 1 — Receives a clock signal that the CMU compares to
I specified low-limit and high-limit frequencies to determine whether the frequency of
the clock signal is between the specified limits.
Metered Clock Signal 0/Monitored Clock Signal Reference — Receives a clock signal
I that the CMU measures against a reference clock frequency. Also provides a
reference clock signal for all monitored clock signals.
DocID027809 Rev 4
*Not used in all CMU block
CMU_MDR
configurations. See the "Clocking"
chapter for specific CMU
implementations.
Frequency Meter
RCDIV
< f / 2
CLKMT0_RMN
CMU_HFREF
f > hfref or
CLKMN1
< f /4
CLKMT0_RMN
f < lfref
CLKMN1
CMU_LFREF
Description
Clock Monitor Unit (CMU)
CMU_FDR
OLR
FLC
FHH
FLL
487/2058
494