Figure 252. Safety-Critical Calibration Remap Datapath With Redundancy - STMicroelectronics SPC572L series Reference Manual

RM0400

Figure 252. Safety-critical calibration remap datapath with redundancy

system logical
address
CRD0
CRD1
CRD15
CRD16
CRD17
CRD31
28.5.13.1.2 e2eECC and data flash accesses
ECC events detected on accesses to the data flash blocks are suppressed from being
reported to the ECC event collection unit.
In the event of a single-bit correction, the corrected data are returned to the requesting
master, and the single-bit correction event is suppressed from being reported.
CRD0 hit?
CRD0
remap addr
CRD1 hit?
CRD1
remap addr
CRD15 hit?
CRD15
remap addr
CRD16 hit?
CRD16
remap addr
CRD17 hit?
CRD17
remap addr
CRD31 hit?
CRD31
remap addr
DocID027809 Rev 4
Flash memory controller (PFLASH Controller)
CRD hit
match?
remap addr
match?
589/2058
590