Table 497. Gtmdi_Tbu0_Wpc2 Field Descriptions - STMicroelectronics SPC572L series Reference Manual

RM0400
42.5.1.39 TBU0 watchpoint control 2 register (GTMDI_TBU0_WPC2)
The GTMDI_TBU0_WPC2 shown in
issued by TBU0. These triggers are used for GTM to enter Halt state, generate watchpoint
messages and control logic external to GTMDI, such as in the SPU interface.
Register index: 95
31 30
R 0
WTSEL1
W
RESET: 0 0
15 14
R 0
WTSEL2
W
RESET: 0 0
Figure 444. TBU0 watchpoint control 2 register (GTMDI_TBU0_WPC2)
Table 497
Field
Watchpoint Trigger Selection 1. The WTSEL1[2:0] field selects among 8 available watchpoint
triggers which one is connected to the TBU0 selected event, match or increment. Other modules
can selected the same WTSEL1 value, in this case the result selection is an OR of all selected
sources.
000 SHARED_WPT[0]
30–28
001 SHARED_WPT[1]
WTSEL1 010 SHARED_WPT[2]
011 SHARED_WPT[3]
100 SHARED_WPT[4]
101 SHARED_WPT[5]
110 SHARED_WPT[6]
111 SHARED_WPT[7]
Start/Stop input signal selection 1. Selects the Start/Stop input that is used by the watchpoint trace
messages. These signals are actually a pair of signals.
21–20
00 SHARED_WPT_ST[0]
STSEL1 01 SHARED_WPT_ST[1]
10 SHARED_WPT_ST[2]
11 SHARED_WPT_ST[3]
Watchpoint Trigger Enable 1.The TEN1 field controls if a watchpoint external trigger is issued by
17 the TBU0 selected event, match or increment.
TEN1 0 Disable Trigger Generation
1 Enable Trigger Generation
Start/Stop Enable 1. The SEN1 bit field enables the TBU0 selected event to consider the Start/Stop
inputs for watchpoint trace message generation. If this bit is cleared, the messages are controlled
16
only by JTAG writes to the WMC1 field in the GTMDI_TBU0_WPC1 register.
SEN1
0 Disable trace control from Start/Stop inputs
1 Enable trace control from Start/Stop inputs
29 28 27 26
0 0
0 0 0 0
13 12 11 10
0 0
0 0 0 0
describes the GTMDI_TBU0_WPC2 register functions.

Table 497. GTMDI_TBU0_WPC2 field descriptions

DocID027809 Rev 4
GTM Development Interface (GTMDI)
Figure 444 register controls the Watchpoint Triggers
25 24 23 22
0 0 0 0
0 0 0 0
9 8 7 6
0 0 0 0
0 0 0 0
Description
21 20 19 18
0 0
STSEL1
0 0 0 0
5 4 3 2
0 0
STSEL2
0 0 0 0
17 16
TEN1 SEN1
0 0
1 0
TEN2 SEN2
0 0
933/2058
960