STMicroelectronics SPC572L series Reference Manual page 1392

SENT Receiver (SRX)
Field
Diagnostic Checks Status bits. These bits indicate which diagnostic has failed or passed on this
channel. These bits are cleared by writing 1 to them.
NUM_EDGES_ERR: Not the expected number of negative edges between calibration pulse. This bit
will not set in case of "Option 2" for successive calibration pulse check is selected. This error will
only set when "Option 1" for successive calibration check is selected (SUCC_CAL_CHK).
FMSG_CRC_ERR: Checksum error in Fast Message
SMSG_CRC_ERR: Checksum error in Slow Serial Message
NIB_VAL_ERR: Any nibble data value <0 or >15
9:15
CAL_DIAG_ERR: Successive Calibration pulses differ by ±1.56%. SAE spec defines it be 1.5625%
but the accuracy of this check depends on the frequency of protocol clock (See
frequency receiver clock (protocol clock) requirements on page
CAL_LEN_ERR: This bit indicates that Calibration pulse is more than 56 ticks ±25%.
PP_DIAG_ERR: This bit indicates that the ratio of calibration pulse length to overall message length
(with pause pulse) is more than ±1.5625% between two messages. This check is valid only for
messages with pause pulse.
0 – Error Check has passed
1 – Error Check has failed
15:016:31 Reserved. Read returns zero
49.3.2.20 Channel 'n' Configuration Register (n = 0 to (CH-1)) (CHn_CONFIG)
This register (CHn_CONFIG) provides the configurability for interrupt assertion for various
events and error as explained in
(CH-1)) (CHn_STATUS)
be required by the user software. This register also configures the width of noise glitches (on
the sensor input) to be filtered out by the input programmable filter.
User must program the contents of this register before enabling the channel by writing to the
corresponding channel enable bit in the
(CHNL_EN).
Note: The value of the CH is device-specific. See the Device Configuration chapter for details.
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Table 808. CHn_STATUS field descriptions(Continued)
and control bits for selection of various receive options that might
DocID027809 Rev 4
Description
Section 49.3.2.19: Channel 'n' Status Register (n = 0 to
Section 49.3.2.2: Channel Enable Register
Section 49.5.3: High
1410).
RM0400