Table 574. Coding Of Dlc In Can Fd - STMicroelectronics SPC572L series Reference Manual

CAN Subsystem
The status bits CCCR.LACT and CCCR.FACT indicate the format of transmitted frames.
When CCCR.LACT is set, frames will be transmitted in CAN FD long format with EDL =
recessive. When both CCCR.LACT and CCCR.FACT are set, frames will be transmitted in
CAN FD Fast format with both EDL and BRS = recessive.
In the CAN FD format, the coding of the DLC differs from the standard CAN format. The
DLC codes 0 to 8 have the same coding as in standard CAN, the codes 9 to 15, which in
standard CAN all code a data field of 8 bytes, are coded according to the following table.
DLC
Number of data bytes
In CAN FD fast frames, the bit timing will be switched inside the frame, after the BRS (Bit
Rate Switch) bit, if this bit is recessive. Before the BRS bit, in the CAN FD arbitration phase,
the standard CAN bit timing is used as defined by the Bit Timing and Prescaler Register
BTP. In the following CAN FD data phase, the fast CAN bit timing is used as defined by the
Fast Bit Timing and Prescaler The bit timing is switched back from the fast timing at the
CRC delimiter or when an error is detected, whichever occurs first.
In both data frame formats, CAN FD long and CAN FD fast, the value of the bit ESI (Error
Status Indicator) is determined by the transmitter's error state at the start of the
transmission. If the transmitter is error passive, ESI is transmitted recessive, else it is
transmitted dominant. In CAN FD remote frames the ESI bit is always transmitted dominant,
independent of the transmitter's error state. The data length code of CAN FD remote frames
is transmitted as zero.
In case a M_CAN Tx Buffer is configured for CAN FD transmission with DLC > 8, the first 8
bytes are transmitted as configured in the Tx Buffer while the remaining part of the data field
is padded with 0xCC. When the M_CAN receives a CAN FD frame with DLC > 8, the first 8
bytes of that frame are stored into the matching Rx Buffer or Rx FIFO. The remaining bytes
are discarded.
44.3.7.4 Transceiver Delay Compensation
During the data phase of a CAN FD transmission only one node is transmitting, all others
are receivers. The length of the bus line has no impact. When transmitting via pin m_can_tx
the protocol controller receives the transmitted data from its local CAN transceiver via pin
m_can_rx. The received data is delayed by the CAN transceiver's loop delay. In case this
delay is greater than TSEG1 (time segment before sample point), a bit error is detected.
Without transceiver delay compensation, the bit rate in the data phase of a CAN FD frame is
limited by the transceivers loop delay.
The CAN FD protocol unit has implemented a delay compensation mechanism to
compensate the CAN transceiver's loop delay, thereby enabling transmission with higher bit
rates during the CAN FD data phase independent of the delay of a specific CAN transceiver.
Figure 520
1058/2058

Table 574. Coding of DLC in CAN FD

9
12
below describes how the transceiver loop delay is measured.
DocID027809 Rev 4
10 11 12
16 20 24
RM0400
13 14 15
32 48 64