Mhz Internal Rc Oscillator (Ircosc) - STMicroelectronics SPC572L series Reference Manual

Clocking
reset value for the XOSC trimming capacitors does not trim the internal capacitor values
(UTEST Misc bit 5:1 = 00000b (XOSC LOAD CAP SEL)).
The internal load capacitor values stored in UTEST flash memory row have triple-voting flip-
flop (TVF) implementation to prevent an incorrect value, and thus an undetectable error in
the system.
The XOSC has the ability to be started with either 8 MHz to 20 MHz, or 40 MHz to 44 MHz
crystal. The XOSC EN_40MHz bit in the UTEST Misc row selects which crystal source will
be used. The default value of this field is for an 8 MHz to 20 MHz crystal
(UTEST Misc bit 10 = 0).
See the flash memory chapter for more information on the UTEST row programming.
21.5.2.2 XOSC register write protection
The XOSC registers with write protection are defined in
have write protection with both soft and hard locking. A soft lock can be unlocked by
software after being previously locked. A hard lock is only unlocked by a reset once locked.
The REG_PROT module is used to implement the XOSC register write protection.
Offset
1. See Register Protection Configuration chapter for bit field details
21.5.2.3 XOSC reset value
Table 214
Offset
21.5.3

16 MHz internal RC oscillator (IRCOSC)

The microcontroller has a 16 MHz internal RC oscillator that is always enabled and can be
used as the clock source for the PLL. The IRCOSC is the default clock after reset. The
register interface is used for user trimming of the oscillator and dividing the output from 1 to
32.
21.5.3.1 IRCOSC register interface
This device has a dedicated digital interface for the IRCOSC. The digital interface provides
a register for fine tuning the IRCOSC frequency by the user. Other registers allow reading of
the settings of IRCOSC temperature sensor, voltage regulator and capacitor trimming
values that are set by the factory. The IRCOSC is always enabled when the device is
powered.
468/2058
Table 213. XOSC register write protection
00h XOSC_CTL—XOSC Control Register
shows the default reset value for the XOSC registers.
Table 214. XOSC register reset values
00h XOSC_CTL—XOSC Control Register
DocID027809 Rev 4
Table 213. The protected registers
Register
Register
RM0400
(1)
Protections?
Yes
Reset value
8030_8000h