Table 605. Sipi_Arr Field Descriptions - STMicroelectronics SPC572L series Reference Manual

RM0400
45.15.1.11 SIPI Address Reload Register (SIPI_ARR)
The SIPI_ARR contains the reload value for the address counter at the target node. It
should be configured by direct write request from the initiator. This register is writeable only
when SIPI_MCR[INIT] = 1.
Offset: 00A8h
0 1
R
W
Reset 0 0
16 17
R
W
Reset 0 0
Field
0–29 Contains the reload value for the address counter at the target node. It should be
configured by direct write request from the initiator.
ADRLD
30-31 Reserved
45.15.1.12 SIPI Address Count Register (SIPI_ACR)
This register reflects the count value of address counter at target node. It should be
configured by direct write request from initiator. This register can be read/written by software
anytime
.
Offset: 00ACh
0 1
R
W
Reset 0 0
16 17
R
W
Reset 0 0
2 3 4 5
0 0 0 0
18 19 20 21
0 0 0 0
Figure 579. SIPI Address Reload Register (SIPI_ARR)

Table 605. SIPI_ARR field descriptions

2 3 4 5
0 0 0 0
18 19 20 21
0 0 0 0
Figure 580. SIPI Address Count Register (SIPI_ACR)
DocID027809 Rev 4
Serial Interprocessor Interface (SIPI)
6 7 8 9
ADRLD[31:16]
0 0 0 0
22 23 24 25
ADRLD[15:2]
0 0 0 0
Description
6 7 8 9
ADCNT[31:16]
0 0 0 0
22 23 24 25
ADCNT[15:2]
0 0 0 0
Access: User read/write
10 11 12 13
0 0 0 0
26 27 28 29
0 0 0 0
Access: User read/write
10 11 12 13
0 0 0 0
26 27 28 29
0 0 0 0
14 15
0 0
30 31
0 0
0 0
14 15
0 0
30 31
0 0
0 0
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