Features - STMicroelectronics SPC572L series Reference Manual

SENT Receiver (SRX)
49.1.1

Features

The SENT receiver module has the following features:
•
The number of SENT channels supported are device-specific. See
SENT Receiver (SRX) configuration
•
Unified message read logic to transfer all messages received to system memory via
interrupts or DMA
–
–
–
–
–
•
Supports compensation for variation in SENT Tx Clock up to ±25% and adjusts its
measurement for drift and jitter in the Transmitter and Receiver clocks per channel
–
•
Implements for each channel all receiver diagnostics as specified by the SAE
Specifications
•
Internal 4-bit CRC calculator that can be configured to compute CRC in both Legacy
and Recommended method (as given in SAE SENT Specification) for both Fast and
Short Serial Message per channel
•
Internal 6-bit CRC calculator for Enhanced Serial Messages per channel
•
Supports all bit rates by having per channel configurable Rx clock periods from 3 µs to
90 µs
•
Support for configurable number of data nibbles per channel
• Option to disable individual channel via programmable control bit
•
Time stamping on start of each valid message (i.e. without errors) across all channels.
This time stamp is appended to each message for synchronization of messages and
for application to understand how much time has elapsed between successive sensor
readings
•
Support for pause pulse per channel. This can be enabled by programming a bit in the
control register for that channel
•
Input Programmable Filter on each channel to filter any glitches on input. This filter
duration is programmable by the user software.
•
32-bit register interface for programming the module's registers and reading the
received messages
•
Works on two clocks, one for accurate receive operations (high frequency receiver
clock or protocol clock) and other for message read logic (system bus clock) and the
module can work irrespective of the frequency relationship between the two clocks.
See
1360/2058
Programmable option per channel to support reading of messages via DMA or
Interrupt
Internal round robin arbitration sequencer to loop across channels to read
messages from each channel leaving CPU/DMA transparent to this process
All received messages are stored excluding the synchronization pulse (for Fast
messages) and identifiers (for Slow Serial Messages)
Separate buffers for storing Fast and Slow Serial Messages
Separate DMA and Interrupts generated for Fast and Slow Serial Messages
Calibration pulse correction factor per channel is available for use by software
Section 49.5: Clocks and resets on page 1408
DocID027809 Rev 4
for details.
for more details on the clocks.
RM0400
Section 6.7.5: