Register Descriptions - STMicroelectronics SPC572L series Reference Manual

RM0400
26.3.1

Register descriptions

26.3.1.1 IRCOSC Control register (IRCOSC_CTL)
The IRCOSC_CTL contains user programmable parameters.
Offset 00h
0 1
R 0 0
W
Reset 0 0
16 17
R 0 0
W
Reset 0 0
1
IRCOSC_CTL is writable only in supervisor mode.
2
This field may sometimes have the value of 1, and can be cleared by writing a 1 to this bit. However, this
field has no effect on the IRCOSC or chip behavior.
3
These bits can be written with any value, but writes are ignored. A read returns last written value.
Field
0:10
Reserved.
User trimming bits with respect to nominal factory frequency
The MSB of the USER_TRIM bits is used to determine whether the frequency will be increased or
11:15
decreased. If MSB = 0 then a change in USER_TRIM[3:0] will decrease the frequency, and likewise,
USER_TRIM
if MSB = 1 then a change in USER_TRIM[3:0] will increase the frequency.
IRCOSC_CTL[USER_TRIM] field is used to trim the IRCOSC frequency.
16:31
Reserved
Table 278. IRCOSC_CTL[USER_TRIM] frequency trimming calculation
2 3 4 5
0 0 0 0
0 0 0 0
18 19 20 21
3 3 3
0 — — —
0 0 0 0
Figure 230. IRCOSC Control register (IRCOSC_CTL)
Table 277. IRCOSC_CTL field descriptions
USER_TRIM[4:0] value
....
10011
10010
10001
10000
00000
00001
DocID027809 Rev 4
6 7 8 9
0 0 0
3
—
0 0 0 0
22 23 24 25
3 3 3
— — — 0
0 0 0 0
Description
IRCOSC digital interface
Access: Read/Write
10 11 12 13
0
USER_TRIM
0 0 0 0
26 27 28 29
2
— 0 0 0
0 0 0 0
Table 278 shows how the
Frequency
....
δf
f
+ (3 × )
TRIM
δf
f
+ (2 × )
TRIM
δf
f
+
TRIM
f
f
δf
f
–
TRIM
14 15
1
0 0
30 31
0 0
0 0
547/2058
549