Rmii Echo - STMicroelectronics SPC572L series Reference Manual

RM0400
48.5.18

RMII echo

The Ethernet controller also supports RMII echo mode, which transmits data on
FEC_TXD[1:0] as it is received on FEC_RXD[1:0]. To enable RMII echo mode, set
RCR[RMII_MODE, RMII_ECHO] bits and clear RCR[RMII_LOOP, LOOP].
48.5.19 Ethernet error-managing procedure
The Ethernet controller reports frame reception and transmission error conditions using the
MIB block counters, the FEC RxBDs, and the EIR register.
48.5.19.1 Transmission errors
48.5.19.1.1 Transmitter underrun
If this error occurs, the FEC sends 32 bits that ensure a CRC error and stops transmitting.
All remaining buffers for that frame are then flushed and closed, and EIR[UN] is set. The
FEC then continues to the next transmit buffer descriptor and begin transmitting the next
frame. The UN interrupt is asserted if enabled in the EIMR register.
48.5.19.1.2 Retransmission attempts limit expired
When this error occurs, the FEC terminates transmission. All remaining buffers for that
frame are flushed and closed, and EIR[RL] is set. The FEC then continues to the next
transmit buffer descriptor and begins transmitting the next frame. The RL interrupt is
asserted if enabled in the EIMR register.
48.5.19.1.3 Late collision
When a collision occurs after the slot time (512 bits starting at the Preamble), the FEC
terminates transmission. All remaining buffers for that frame are flushed and closed, and
Figure 775. RMII loopback mode
FEC
Transmit
Receive
Figure 776. RMII echo mode
FEC
Transmit
Receive
DocID027809 Rev 4
Fast Ethernet Controller (FEC)
RMII
FEC_TXD[1:0]
TX
RX
RMII
FEC_TXD[1:0]
TX
FEC_RXD[1:0]
RX
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