STMicroelectronics SPC572L series Reference Manual page 883

RM0400
Field
Clear Halt Request. Writing this bit to one clears halt requests., which means GTM resumes normal
operation out of halt state. The status bits of the GTMDI_DS register are cleared. This bit is self-
8
cleared thus read always as zero.
CHR
0 No action
1 Clear halt requests
EVTI Debug Request enable. The EIDR bit enables EVTI input to request the GTM to enter Halt
state. After the GTM enters Halt state due to a pulse in EVTI signal, the EIDR bit state is not
6 meaningful, thus it may be cleared and the GTM continues in Halt state. See
about debug enable logic.
EIDR
0 Disable EVTI to control GTM to enter Halt state
1 Enable EVTI to control GTM to enter Halt state
Debug Enable. DBE enables debug mode thus allowing the GTM to enter debug mode which
means halt regular operation. The debug events controlled by this register are the ones generated
4 internally to the GTMDI, excluding ipg_debug and EVTI which have their dedicated enable control.
See Figure 452
DBE
0 Debug mode disabled
1 Debug mode enabled
Debug Request. Mechanism to allow development tool to request modules to enter debug mode
3 directly. See
DBR 0 Does not modify GTM IP debug state
1 Request GTM IP to enter debug mode
System Debug Enable. The SDBE bit enables the GTM to enter halt state if system level debug
enable signal is asserted. This bit allows the debug controller to select specific sub-groups of cores
2 or modules to halt, while others continue to operate. GDE bit must also be set to allow GTM to halt.
See Figure 452
SDBE
0 GTM does not enter halt state due to system debug enable signal assertion
1 GTM is enabled to enter halt state due to system debug enable signal assertion
Timestamp Force Transmission. Forces the transmission of the Timestamp value along with the
Nexus message data for all messages transmitted by the GTMDI Client module. When Timestamp
0
inclusion is not forced into the client message, its inclusion depends upon the NAR settings.
TSFT
0 Does not force transmission of Timestamp value
1 Forces transmission of Timestamp along with Nexus message
42.5.1.3 GTMDI development status register (GTMDI_DS)
The GTMDI_DS register described in
impact GTM development support. All status bits are dynamic and do not require clearing.
Debug Status Event is queued due to a change in the Halt or Stop modes and a Debug
Status Message is generated as soon as there is an opportunity in the NAR interface. If any
status bit changes before the Status message is sent, this change is reflected in the
message. The GTMDI_DS register dynamically tracks the debug condition status even
when several of them are simultaneously set.
Table 460. GTMDI_DC field descriptions(Continued)
for details about debug enable logic.
Figure 452 for details about debug enable logic.
for details about debug enable logic.
DocID027809 Rev 4
GTM Development Interface (GTMDI)
Description
Figure 408 shows the status of various conditions that
Figure 452 for details
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