Introduction - STMicroelectronics SPC572L series Reference Manual

RM0400
50 LINFlexD
50.1

Introduction

The LINFlexD controller is designed to manage a high number of LIN messages efficiently
with a minimum of CPU load. To reduce the CPU loading in Master mode, LINFlexD
autonomously handles the LIN messages once software has triggered the header
transmission, until the next header transmission request in transmitter mode or until
checksum reception in the receiver mode.
The LINFlexD supports LIN protocol version 1.3, 2.0, and 2.1. It also consists of an 8-byte
buffer for transmission/reception data.
The LINFlexD also provides support for some of the basic UART transfers of 8-bit, 9-bit, 16-
bit, and 17-bit frames and also 12-bit data frame + parity reception in UART mode for MSC
support.
The LINFlexD supports multi-channels and parametric DMA Tx/Rx interface in LIN/UART
operating mode.
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