Table 571. Tx Event Fifo Element - STMicroelectronics SPC572L series Reference Manual

CAN Subsystem
T3 Bits 15:8
RT3 Bits 7:0
44.3.6.3 Tx event FIFO element
Each element stores information about transmitted messages. By reading the Tx Event
FIFO the Host CPU gets this information in the order the messages were transmitted. Status
information about the Tx Event FIFO can be obtained from register TXEFS.
31
E0
E1 MM[7:0]
E0 Bit 31 ESI
E0 Bit 30 XTD
E0 Bit 29 RTR
E0 Bits 28:0 ID[28:0]
E1 Bits 31:24 MM[7:0]
E1 Bit 23:22
ET[1:0]
E1 Bit 21
EDL
1050/2058
Table 570. Tx Buffer Element descriptions(Continued)
DB5[7:0]: Data Byte 5
DB4[7:0]: Data Byte 4
Figure 517. Tx Event FIFO Element
24 23
ET[1:
DLC[3:0]
0]

Table 571. Tx Event FIFO Element

Error State Indicator
0 Transmitting node is error active
1 Transmitting node is error passive
Extended Identifier
0 11-bit standard identifier
1 29-bit extended identifier
Remote Transmission Request
0 Data frame transmitted
1 Remote frame transmitted
Identifier
Standard or extended identifier depending on bit XTD. A standard identifier has to be
written to ID[28:18].
Message Marker
Copied from Tx Buffer into Tx Event FIFO element for identification of Tx message
status
Event Type
00 Reserved
01 Tx event
10 Transmission in spite of cancellation (always set for transmissions in DAR mode)
11 Reserved
Extended Data Length
0 Standard frame format
1 CAN FD frame format (new DLC-coding and CRC)
DocID027809 Rev 4
16 15
ID[28:0]
8 7
TXTS[15:0]
RM0400
0