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44.3.5.2.38 Tx Buffer Cancellation Finished Register (TXBCF)
Address: 0x00DC
0
1
R
W
Reset
0
0
16
17
18
R
W
Reset
0
0
Table 563. Tx Buffer Cancellation Finished field description
Field
[0:31]
CF
44.3.5.2.39 Tx Buffer Transmission Interrupt Enable Register (TXBTIE)
Address: 0x00E0
0
1
R
W
Reset
0
0
16
17
18
R
W
Reset
0
0
Figure 509. Tx Buffer Transmission Interrupt Enable register
2
3
4
5
0
0
0
0
19
20
21
0
0
0
0
Figure 508. Tx Buffer Cancellation Finished register
Cancellation Finished.
Each Tx Buffer has its own Cancellation Finished bit. The bits are set when the
corresponding TXBRP bit is cleared after a cancellation was requested via TXBCR. In
case the corresponding TXBRP bit was not set at the point of cancellation, CF is set
immediately. The bits are reset when a new transmission is requested by writing a '1' to
the corresponding bit of register TXBAR.
0 No transmit buffer cancellation
1 Transmit buffer cancellation finished
2
3
4
5
0
0
0
0
19
20
21
0
0
0
0
6
7
8
9
CF
0
0
0
0
22
23
24
25
CF
0
0
0
0
Description
6
7
8
9
TIE
0
0
0
0
22
23
24
25
TIE
0
0
0
0
DocID027809 Rev 4
CAN Subsystem
10
11
12
13
0
0
0
0
26
27
28
29
0
0
0
0
Access: Read/write
10
11
12
13
0
0
0
0
26
27
28
29
0
0
0
0
Access: Read
14
15
0
0
30
31
0
0
14
15
0
0
30
31
0
0
1043/2058
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