STMicroelectronics SPC572L series Reference Manual page 602

Embedded Flash Memory (MP55)
Field
Program/Erase Good (read only)
PEG is automatically updated to show the completion status of the last Flash Program or
Erase sequence involving high voltage operations.
PEG is evaluated on the completion status of only the interlocked doubleword during page
program or quad-page programming where some doubleword addresses are not interlocked
(already programmed or intended to remain virgin).
PEG is set to '0' after Aborting a Program/Erase high voltage operation, indicating sequence
failure.
PEG is set to '1' when the Flash Memory module is reset, unless a Flash Initialization error
has been detected.
Note: PEG is valid only when PGM=1 and/or ERS=1 and after DONE 0–1 transitions due to
If Program or Erase is attempted on blocks that are locked, PEG=1 indicating that the
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operation was successful and the content of the block was properly protected from the
Program or Erase operation. Blocks can be locked through LOCK0/1/2 registers OR with
PEG
f90_plock0/1/2 sideband signals.
If a Program operation tries to write '1' to bits that are '0', the program operation is correctly
executed on the new bits to be programmed at '0', but PEG is cleared indicating that the
requested operation has failed.
If Programming during an Erase-Suspend a location that was under suspended erase,
program is not executed and PEG is set to '0'.
PEG behavior with blocks marked as OPP (though f90_otpen0/1/2 sidebands signal) is the
following: PEG=0 if the location to be programmed is not virgin, and thus would not be over
programmed.
In Array Integrity Check or Margin Read PEG is not altered when the operation is completed,
regardless the occurrence of any error, abort, break point or suspend. The presence of errors
can be detected only comparing checksum value stored in UM0–9 and checking MCR flags.
0 Program, Erase operation failed or Program, Erase aborted.
1 Program or Erase operation successful.
Program/Erase Complete Interrupt Enable (Read/Write).
PECIE provides a mechanism to trigger an interrupt request upon the assertion of the DONE
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flag.
PECIE
0 An interrupt request is not generated when the DONE flag is set.
1 An interrupt request is generated when the DONE flag is set.
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Table 298. MCR field descriptions(Continued)
an Abort or the completion of a Program/Erase operation.
PEG remains valid until PGM/ERS 1–0 transitions or EHV 0–1 transitions.
PEG is not valid after DONE 0–1 transitions when ESUS/PSUS is set to logic '1'.
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Description
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