Figure 214. Auxiliary Clock 11 Select Control Register (Cgm_Ac11_Sc) - STMicroelectronics SPC572L series Reference Manual

Clock Generation Module (MC_CGM)
Table 265. Auxiliary Clock 10 Divider 0 Configuration Register (CGM_AC10_DC0) field
Field
Divider Enable
0
0 Disable auxiliary clock 10 divider 0
DE
1 Enable auxiliary clock 10 divider 0
1–11 Reserved
Divider Division Value — The resultant FEC reference clock will have a period 'DIV + 1' times that of
12–15
auxiliary clock 10. If DE is set to 0 (divider 0 is disabled), any write access to the DIV field is ignored and
DIV
the FEC reference clock remains disabled.
16–31 Reserved
24.3.1.34 Auxiliary Clock 11 Select Control Register (CGM_AC11_SC)
Address 0x0960
0 1 2
R 0 0 0
W
Reset 0 0 0
16 17 18
R 0 0 0
W
Reset 0 0 0

Figure 214. Auxiliary Clock 11 Select Control Register (CGM_AC11_SC)

This register is used to select the current clock source for the for the following clocks:
• undivided: (unused)
•
divided by auxiliary clock 11 divider 0: DSPI clock 0
•
divided by auxiliary clock 11 divider 1: DSPI clock 1
See Figure 225 for details.
526/2058
descriptions
Access: User read/write, Supervisor read/write, Test read/write
3 4 5 6
0
SELCTL
0 0 0 0
19 20 21 22
0 0 0 0
0 0 0 0
DocID027809 Rev 4
Description
7 8 9 10
0 0 0
0 0 0 0
23 24 25 26
0 0 0 0
0 0 0 0
RM0400
11 12 13 14
0 0 0 0
0 0 0 0
27 28 29 30
0 0 0 0
0 0 0 0
15
0
0
31
0
0