Features - STMicroelectronics SPC572L series Reference Manual

RM0400
PBRIDGE 0
CAN bus interface
and module
clock
Peripheral
Bridge
Peripheral
Bridge
1: Number of M_CAN nodes vary per device. x = 1 to n. Please refer the Device Configuration chapter
number of M_CAN nodes used in the device.
44.2

Features

The CAN subsystem consists of the following major blocks:
•
Modular CAN cores: The registers of the CAN module can be accessed using the
Generic Slave Interface (GSI)
•
CAN-RAM arbiter
•
SRAM interface and memory organization
•
ECC Controller
•
Transmit message buffer locking mechanism
–
Figure 470. CAN subsystem generic block diagram
M_CAN
Host Clock
GSI
M_CANx
Host Clock
GSI
Trigger memory locking
DocID027809 Rev 4
CAN Clock
x
1
RX/TX
GMI
CAN Clock
1
RX/TX
GMI
CAN Subsystem
PBRIDGE 0 Clock
CAN protocol
clock
RAM/ECC
Controller
+
Common
RAM
Shared
access
Single-point
arbiter
SRAM
+
(CAN
Transmit
Message
RAM)
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