Table 315. Um2 Field Descriptions - STMicroelectronics SPC572L series Reference Manual

RM0400
29.3.2.11.3 User Multiple Input Signature 2 register (UM2)
UM2 represents bits 95–64 of the whole 144-bit word (2 doublewords including ECC).
Address: 0x0060
0 1
R
W
Reset 0 0
16 17
R
W
Reset 0 0
Figure 266. User Multiple Input Signature 2 register (UM2)
Field
Multiple input signature 95–64 (Read/Write).
0–31
MISR registers accumulate a signature from an array integrity event. The MISR captures all data
MISR[64:95] fields, as well as ECC fields and the ECC error signal. Data (read and ECC) in the MISR
represents corrected data (if required) captured after ECC logic is applied.
29.3.2.11.4 User Multiple Input Signature 3 register (UM3)
UM3 represents bits 127–96 of the whole 144-bit word (2 doublewords including ECC).
Address: 0x0064
0 1
R
W
Reset 0 0
16 17
R
W
Reset 0 0
Figure 267. User Multiple Input Signature 3 register (UM3)
Field
Multiple input signature 127–96 (Read/Write).
0–31
MISR registers accumulate a signature from an array integrity event. The MISR captures all data
MISR[96:127] fields, as well as ECC fields and the ECC error signal. Data (read and ECC) in the MISR
represents corrected data (if required) captured after ECC logic is applied.
2 3 4 5
0 0 0 0
18 19 20 21
0 0 0 0

Table 315. UM2 field descriptions

2 3 4 5
0 0 0 0
18 19 20 21
0 0 0 0
Table 316. UM3 field descriptions
DocID027809 Rev 4
6 7 8 9
MISR
0 0 0 0
22 23 24 25
MISR
0 0 0 0
Description
6 7 8 9
MISR
0 0 0 0
22 23 24 25
MISR
0 0 0 0
Description
Embedded Flash Memory (MP55)
Access: User Read/Write
10 11 12 13
0 0 0 0
26 27 28 29
0 0 0 0
Access: User Read/Write
10 11 12 13
0 0 0 0
26 27 28 29
0 0 0 0
14 15
0 0
30 31
0 0
14 15
0 0
30 31
0 0
623/2058
644