Figure 823. Start Detection And Sampling For Over Sampling Rate = 4 (Case 5) - STMicroelectronics SPC572L series Reference Manual

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Figure 823. Start detection and sampling for over sampling rate = 4 (Case 5)

1:1 voting, CSP = 3
1
Sample count
Note:
1) D
, D
: Databits
0
1
2) X: Due to sampling during transition of the bit, value might be sampled as a '0' or '1' depending on the rise/fall time.
Therefore 'X' refers to a non deterministic value.
50.3.2.8
Baud rate generation
The LIN baud rate is programmed in two registers: the LIN Integer Baud Rate register and
the LIN Fraction Baud Rate register. The baud rate registers can be programmed only
during Initialization mode.
The baud rate is calculated with the following formula for both receiver and transmitter:
Equation 39
Tx = Rx = LIN_CLK / (16 × LDIV)
Where LIN_CLK is the frequency of the baud clock (ipg_baud_clk).
LDIV is an unsigned fixed point number. The mantissa is coded into 20 bits of LINIBRR and
the fraction is coded on 4 bits of LINFBRR.
When reduced oversampling is enabled LINFBRR is not used and LDIV contains only the
integer part of LINIBRR.
When ROSE = 0 (For LIN and UART mode):
LDIV = 1041.67, LIN_CLK = 80 MHz
LINIBRR = 1041d = 411 h
LINFBRR = 11d = B h
Baud rate = 80 MHz/(16 x 1041,67) = 4.8 Kbit/s
Note:
Due to design constraints the maximum baud rate achievable is 25 Mbit/s.
Note:
The relationship "(2/3)*LIN_CLK > PBRIDGEx_CLK > 1/3*LIN_CLK" should also be
maintained.
50.3.2.9
Automatic resynchronization
To automatically adjust the baud rate based on measurement of the LIN sync field, write the
nominal Prescaler value (nominal baud rate) in LINIBRR and LINFBRR, then set the LASE
bit in LINCR1 to enable automatic synchronization.
1
1
1
1
1
1
DocID027809 Rev 4
Start bit
Data bit 0
X
0
X
0
D
D
0
0
3
0
0
1
2
Start not detected
Example 22.
Data bit 1
D
D
D
D
D
D
0
0
1
1
1
3
0
1
2
1
2
LINFlexD
........
1
3
1431/2058
1506

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