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Analog-to-digital converter (ADC) configuration
Name
SARADC4_DMAE
SARADC4_ICDSR1
SARADC4_
WTHRHLR0–
WTHRHLR3
SARADC4_CTR0–3
SARADC4_ICNCMR1
SARADC4_ICJCMR1
SARADC4_PDEDR
730/2058
Table 354. SAR ADC4 register definitions(Continued)
0
1
2
3
16
17
18
19
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
W
R
0
0
0
0
W
R
0
0
W
R
0
0
0
0
W
R
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
DocID027809 Rev 4
27
5
6
7
8
20
21
22
23
24
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PRECHG
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
9
10
11
12
13
25
26
27
28
29
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
THRH
THRL
0
0
0
0
0
INPSAMP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PDED
RM0400
14
15
30
31
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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