Debug Enable Logic - STMicroelectronics SPC572L series Reference Manual

RM0400
42.6.1

Debug enable logic

In order to enable the GTM to enter Halt state, which is the module debug state, there are
some registers that need to be set. The sources that can put GTM in halt state are events
from TIM, TOM, ATOM, MCS and several other internal GTM modules that are selected and
controlled by the GTMDI_DC register bits shown in
external signal is also a source of halts, as well as direct JTAG write to control register.
Figure 452
for a description of the register bits mentioned in
EVTI
Halt
GTM Module
events from
TIM, TOM,
ATOM, etc.
system debug request
42.6.2 TIM-TOM-ATOM selection and control logic
The TIM sub-modules can be selected to generate signals that control the watchpoint
messages, Halt GTM and watchpoint outputs from the GTMDI module.
describes the TIM selection logic for generation of watchpoint messages, GTM halt and
external watchpoint triggers. This logic is duplicated thus allowing independent selection of
two TIM filtered inputs.
process. Watchpoint Logic 1 and Watchpoint Logic 2 are two implementations for the same
logic.
describes the logic behind the Halt signal generated by GTMDI. See
Figure 452. GTM Halt signal enable logic
EIDR
GTMDI
Event
selection
logic
DBR
debug request
SDBE
system debug enable
Figure 453
DocID027809 Rev 4
GTM Development Interface (GTMDI)
Figure
Figure
DBE
debug enable
also shows the register bits that control the selection
407. The system debug request
452.
GTMDI
GDE
global debug enable
Figure 453
Figure 407
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