STMicroelectronics SPC572L series Reference Manual page 770

Successive Approximation Register Analog-to-Digital Converter (SARADC) Digital Interface
Field
Normal trigger edge selection
6–7
00 Falling edge of normal trigger is selected.
NEDGESEL[1:0] 01 Rising edge of normal trigger is selected.
1x Both rising and falling edges of normal trigger are selected. (x = 0,1)
Injected Start conversion
Setting this bit will start the configured injected analog channels to be converted by software.
8
Resetting this bit has no effect, as the injected chain conversion cannot be interrupted.
JSTART
0 Writing '0' has no effect.
1 Starts the injected chain conversion
Injection trigger enable
9
0 Injection trigger disabled for channel injection (injected conversion cannot be started using an
JTRGEN injection trigger)
1 Injection trigger enabled for channel injection
Injection trigger edge selection
10–11
00 Falling edge of injection trigger is selected.
JEDGESEL[1:0] 01 Rising edge of injection trigger is selected.
1x Both rising and falling edges of injection trigger are selected. (x = 0,1)
Injection trigger sequence enable
12
0 Injection trigger sequence mode is disabled.
JTRGSEQ
1 Injection trigger sequence mode is enabled.
Reserved
13
Write of any value has no effect; read value is always 0.
14–15 Reserved
Reserved
16–19
Write of any value has no effect; read value is always 0.
Injection Trigger Input Selection
This bitfield selects which trigger input to be selected to start injected conversion.
20–23
0000 Trigger input 0 is selected
JTRGSEL[3:0]
0001 Trigger input 1 is selected
...
1111 Trigger input 15 is selected.
Abort Chain
When this bit is set, the ongoing Chain Conversion is aborted. This bit is reset by hardware as
soon as a new conversion is requested.
24
0 Conversion is not affected
ABORTCHAIN
1 Aborts the ongoing chain conversion
Note: Behavior of this request during CTU mode is mentioned in CTU trigger/control mode
Abort Conversion
When this bit is set, the ongoing conversion is aborted and a new conversion is invoked. This bit
is reset by hardware as soon as a new conversion is invoked.
25
0 Conversion is not affected
ABORT
1 Aborts the ongoing conversion
Note: Behavior of this request during CTU mode is mentioned in CTU trigger/control mode
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Table 370. MCR field descriptions(Continued)
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