Figure 638. Lfast Frame Structure - STMicroelectronics SPC572L series Reference Manual

RM0400 LVDS Fast Asynchronous Serial Transmission (LFAST) – Interprocessor Communica-
16 bit fixed sync pattern
1010100001001011
SYNC
b7...b5
Payload
b7...b5
size
000 8
001 32
010 64
011 96
100 128
101 256
111 288
b7...b5 bits of the header

Figure 638. LFAST frame structure

HEADER
b4...b1
b4...b1
Frame
size
32
0000
56
88
120
0001
152
280
0011
312
0100
0101
0110
1000
1001
1010
1011
Others
b4...b1 bits of the header
DocID027809 Rev 4
Variable length payload
PAYLOAD
Channel type
Interface Control
Unsolicited
status
CTS Transfer
DATA Channel A
DATA Channel B
DATA Channel C
0111 DATA Channel D
DATA Channel E
DATA Channel F
DATA Channel
G
DATA Channel H
Reserved
b0
Use case
LFAST Master
sends ICLC.
LFAST Slave
sends Ping
response
Both LFAST
master and
slave link.
For both LFAST
master and
slave Rx link
For Data
transfer by
LFAST master
and slave
—
b0 = CTS
1223/2058
1292