Table 658. Cocr Field Descriptions - STMicroelectronics SPC572L series Reference Manual

LVDS Fast Asynchronous Serial Transmission (LFAST) – Interprocessor Communications
Field
Sampler Data Path Selector (overrides the correlator selection). Defines the sampler data path to be
activated at all the times. All the bits should be 0 (00h) for Sampler Data Path to be selected by the
correlator. In Low Speed mode only Sampler Data Paths 0-3 are valid.
00h Sampler Data Path selected by correlator
01h Sampler Data Path 0 selected
02h Sampler Data Path 1 selected
0-7
04h Sampler Data Path 2 selected
SMPSEL
08h Sampler Data Path 3 selected
10h Sampler Data Path 4 selected
20h Sampler Data Path 5 selected
40h Sampler Data Path 6 selected
others Sampler Data Path 7 selected
8-27 Reserved
Correlator threshold level. Defines the correlation threshold level.
000 9 Bits of correlation
28-30 001 10 Bits of correlation
CORRTH ...
110 15 Bits of correlation
111 16 Bits of correlation
31 Reserved
47.6.2.4 Test Mode Control Register (TMCR)
The TMCR enables and configures the LFAST clock test and loopback modes
.
Offset:
000Ch
0 1
R 0 0
W
Reset 0 0
16 17
R
W
Reset 0 0
1
Writable only when TMCR[LPON] = 0.
1232/2058

Table 658. COCR field descriptions

2 3 4 5
0 0 0 0
0 0 0 0
18 19 20 21
0 0 0 0
Figure 644. Test Mode Control Register (TMCR)
DocID027809 Rev 4
Description
6 7 8 9
0 0
0 0 0 0
22 23 24 25
1
LPFRMTH
0 0 0 0
Access: User read/write
10 11 12 13
0 0 0
LPMOD
0 0 0 0
26 27 28 29
0 0 0 0
14 15
1
0 0
30 31
0 0